Etching processes using c4f8 for silicon dioxide 
and cf4 for titanium nitride

ABSTRACT

Methods of etching a dielectric layer and a cap layer over a conductor to expose the conductor are disclosed. In one embodiment, the methods include the use of a silicon dioxide (SiO 2 ) etching chemistry including octafluorocyclobutane (C 4 F 8 ) and a titanium nitride (TiN) etching chemistry including tetrafluoro methane (CF 4 ). The methods prevent etch rate degradation and exhibit reduced electro-static discharge (ESD) defects.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates generally to semiconductor fabrication,and more particularly, to etching processes using octafluorocyclobutane(C₄F₈) for silicon dioxide (SiO₂) and tetrafluoro methane (CF₄) fortitanium nitride (TiN).

2. Related Art

In the semiconductor industry, reactive ion etching (RIE) is used toopen pathways for circuitry within a semiconductor chip. One structureformed using RIE, for example, is a via, which electrically connectsconductors within different layers. RIE is a variation of plasma (gas)etching in which a semiconductor wafer is placed on a radio frequency(RF) powered electrode, and etching species are extracted andaccelerated from the plasma toward the surface to be etched. A chemicaletching reaction occurs that removes parts of the surface. RIE is one ofthe most common etching techniques in semiconductor manufacturing.

Referring to FIG. 1, a conventional semiconductor structure 10 includinglayers 12, 14 prior to etching is shown. Structure 10 includes aconductor layer 14 including a dielectric layer 16 (e.g., of silicondioxide (SiO₂)) surrounding a conductor 18 (e.g., of copper (Cu) oraluminum (Al)); a cap layer 20 (e.g., of titanium nitride (TiN)) atopconductor level 14; a dielectric layer 22 (e.g., of silicon dioxide(SiO₂)) atop cap layer 20; another dielectric layer 24 (e.g., of siliconnitride Si₃N₄) atop dielectric layer 22; and a patterned photoresist 26.

A typical RIE process is conducted in a single plasma chamber capable oftwo RF settings, e.g., approximately 2 MHz (bottom RF source electrode)and approximately 27 MHz (top bias power electrode). One conventionalRIE process for a stack having the following thicknesses: 6 μm ofphotoresist 26 (e.g., Gpoly), 4000 Å of dielectric layer 24 of siliconnitride, 4500 Å of dielectric layer 22 of silicon dioxide and 250-350 Åof cap layer 20 of titanium nitride will now be described. Theconventional RIE process may include the following steps: performing adescum, etching dielectric layer 24, etching dielectric layer 22 usingargon (Ar), tetrafluoro methane (CF₄) and carbon monoxide (CO), and atwo step etching of cap layer 20. A first cap layer etching step may useargon (Ar), octafluorocyclobutane (C₄F₈), oxygen (O₂), and trifluoromethane (CHF₃), and a second cap layer etching step may use argon (Ar)and nitrogen trifluoride (NF₃). Finally, an oxygen (O₂) plasma chemistry(ash) is performed to remove residual RIE polymers from conductor 18.

The conventional RIE process for removing TiN in a dielectric etch toolsuffers from a number of problems. First, it leads to tool degradation,and more specifically, to a lowered etch rate and a decreased etchuniformity of subsequent RIE processing, which reduces yield. Second,typical plasma processes lead to wafer degradation. For example, theabove-described process has exhibited increased electro-static discharge(ESD) defects within kerfs of wafers. One approach to address thissituation has been to employ metal etch systems, rather than dielectricetching systems. However, these systems cause defects in the profile ofthe remaining conductor 18, e.g., of aluminum (Al), under cap layer 20(titanium nitride). That is, they are not selective to aluminum (Al).

In view of the foregoing, there is a need in the art for an improved RIEprocess that does not suffer from the problems of the related art.

SUMMARY OF THE INVENTION

The invention includes methods of etching a dielectric layer and a caplayer over a conductor to expose the conductor. In one embodiment, themethods include the use of a silicon dioxide (SiO₂) etching chemistryincluding octafluorocyclobutane (C₄F₈) and a titanium nitride (TiN)etching chemistry including tetrafluoro methane (CF₄). The processprevents etch rate degradation and exhibits reduced ESD defects.

A first aspect of the invention is directed to a method of etching toexpose a conductor, the method comprising the steps of: etching througha first dielectric layer including silicon dioxide (SiO₂) using achemistry including octafluorocyclobutane (C₄F₈); and etching through acap layer including titanium nitride (TiN) using a chemistry includingtetrafluoro methane (CF₄) to expose the conductor.

A second aspect of the invention includes a method of etching to exposea conductor, the method comprising the steps of: etching through a firstdielectric layer including silicon nitride (Si₃N₄); etching through asecond dielectric layer including silicon dioxide (SiO₂) using achemistry including a gas flow of approximately 13-17 standard cubiccentimeters (sccm) of octafluorocyclobutane (C₄F₈); and etching througha cap layer including titanium nitride (TiN) using a chemistry includinga gas flow of approximately 135-165 sccm of tetrafluoro methane (CF₄) toexpose the conductor.

A third aspect of the invention relates to a method of exposing aconductor below a stack including a patterned photoresist over a siliconnitride (Si₃N₄) layer over a silicon dioxide (SiO₂) layer over atitanium nitride (TiN) cap layer, the method comprising the steps of:etching through the silicon nitride (Si₃N₄); etching through the silicondioxide (SiO₂) using the following conditions: approximately 90-110mTorr (mT) of pressure, an RF energy of approximately 950-1050 watts (W)at approximately 27 MHz and at approximately 2 MHz, and a gas flow ofapproximately 375-425 sccm of argon (Ar), approximately 13-17 sccm ofoctafluorocyclobutane (C₄F₈) and approximately 5-7 sccm of oxygen (O₂);and etching through the titanium nitride layer include titanium nitride(TiN) using the following conditions: approximately 255-285 mT ofpressure, an RF energy of approximately 1350-1450 W at approximately 27MHz and approximately 650-750 W at approximately 2 MHz, and a gas flowof approximately 135-165 sccm of tetrafluoro methane (CF₄) andapproximately 90-110 sccm of nitrogen (N₂).

The foregoing and other features of the invention will be apparent fromthe following more particular description of embodiments of theinvention.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments of this invention will be described in detail, withreference to the following figures, wherein like designations denotelike elements, and wherein:

FIG. 1 shows a conventional semiconductor structure including dielectriclayers prior to etching.

FIGS. 2-6 show one embodiment of a method of etching according to theinvention.

It is noted that the drawings of the invention are not to scale. Thedrawings are intended to depict only typical aspects of the invention,and therefore should not be considered as limiting the scope of theinvention. In the drawings, like numbering represents like elementsbetween the drawings.

DETAILED DESCRIPTION

With reference to the accompanying drawings, FIG. 2-6 show oneembodiment of a method of etching to form an opening to expose aconductor according to the invention. A pattern for the opening isprovided by a photoresist. The method modifies the conventional processsuch that electro-static discharge (ESD) defects are reduced and etchrates are not degraded. The process is carried out in a typicaldielectric reactive ion etching (RIE) tool, i.e., not a metal RIE tool.The RIE chamber used is capable of two RF settings, e.g., approximately2 MHz (bottom RF source electrode) and approximately 27 MHz (top biaspower electrode).

The process begins with a conventional semiconductor structure 100including a stack (sometimes referred to as a large-via pad stack)including dielectric layers 112, similar to that shown in FIG. 1.Structure 100 includes a conductor level 114 including a dielectriclayer 116 (e.g., of silicon dioxide (SiO₂) or any other appropriatedielectric material) surrounding a conductor 118 (e.g., of copper (Cu)or aluminum (Al)). A stack over conductor 118 includes a cap layer 120including titanium nitride (TiN) atop conductor level 114; a dielectriclayer 122 including silicon dioxide (SiO₂) over cap layer 120; anotherdielectric layer 124 including silicon nitride (Si₃N₄) over dielectriclayer 122; and a patterned photoresist 126. Patterned photoresist 126includes a pattern for the opening to be formed to expose conductor 118.Dielectric layer 122 may include any silicon dioxide (SiO₂) typematerial such as hydrogenated silicon oxycarbide (SiCOH), CORAL™available from Novellus, tetraethyl orthosilicate (Si(OC₂H₅)₄ )(TEOS),fluorine doped TEOS (FTEOS), fluorine doped silicate glass (FSG),undoped silicate glass (USG), boro-phospho-silicate glass (BPSG), etc.Cap layer 120 may include any typical titanium nitride-based capmaterial.

The invention is described relative to a stack having the followingthicknesses: 6 μm of photoresist 126 (e.g., Gpoly), 4000 Å of dielectriclayer 124 of silicon nitride, 4500 Å of dielectric layer 122 includingsilicon dioxide and 250-350 Å of cap layer 120 including titaniumnitride (TiN). It should be recognized that where the stack thicknessesvary, at least the time of etching may vary appropriately.

An initial step of the method includes, as shown in FIG. 2, performing adescum 200. The descum performing step removes remaining residuals fromthe lithography step prior to etching, which allows for a more uniformetch of the silicon nitride surface. In one embodiment, the descum isperformed using a gas flow of nitrogen (N₂) and hydrogen (H₂). In thisdescription and the claims, the term “approximately X-Y” will be used.It is understood that the approximation applies to the lower value andthe higher value of the range. The descum performing step may continuefor approximately 8-12 seconds. The descum performing step may alsoinclude using the following additional conditions: a wafer-holding chuck90 (FIGS. 2-6) pressure of approximately 18-22 Torr of helium (He), anda chuck temperature may be approximately 18-22° C.

As shown in FIG. 3, etching 202 through dielectric layer 124, e.g.,silicon nitride, is next. The etch conditions 202 used may be anyconventional method. For example, etch conditions 202 may include usinga gas flow of argon (Ar), tetrafluoro methane (CF₄), trifluoro methane(CHF₃) and oxygen (O₂). Trifluoro methane (CHF₃) (also known asfluoroform) is available, for example, under trade name Freon® 23 fromDupont. Etching 202 may continue for approximately 40-50 seconds. Achuck 90 pressure may be, for example, approximately 18-20 Torr ofhelium (He), and a chuck 90 temperature may be approximately 18-20° C.

Next, as shown in FIG. 4, dielectric layer 122 including silicon dioxide(SiO₂) is etched. In one embodiment, etching chemistry 204 includesusing the following conditions: approximately 90-110 mTorr (mT) ofpressure, an RF energy of approximately 950-1050 watts (W) atapproximately 27 MHz and at approximately 2 MHz, and a gas flow ofapproximately 375-425 sccm of argon (Ar), approximately 13-17 sccm ofoctafluorocyclobutane (C₄F₈) and approximately 5-7 sccm of oxygen (O₂).Etching 204 may last for approximately 80-95 seconds. Etching 204 mayalso using the following conditions: a wafer-holding chuck 90 pressureof approximately 18-22 Torr of helium (He), and a chuck temperature maybe approximately 18-22° C.

Referring to FIG. 5, a next step includes etching cap layer 120including titanium nitride (TiN). Etching 206 may use the followingconditions: approximately 255-285 mT of pressure, an RF energy ofapproximately 1350-1450 W at approximately 27 MHz and approximately650-750 W at approximately 2 MHz, and a gas flow of approximately135-165 sccm of tetrafluoro methane (CF₄) and approximately 90-110 sccmof nitrogen (N₂). Etching 206 may last for approximately 85-100 seconds.Etching 206 may also using the following conditions: a wafer-holdingchuck 90 pressure of approximately 18-22 Torr of helium (He), and achuck temperature may be approximately 18-22° C.

FIG. 6 shows a next step including performing an ash step 208 to removeresidual RIE polymers from conductor 118. Ash performing step 208 mayinclude any now known or later developed oxygen-based ashing chemistry.

The above-described invention provides a two-step process for etchingsilicon dioxide (SiO2) and titanium nitride (TiN). The process isselective to aluminum (Al) and exhausts less of photoresist 126 comparedto conventional RIE processes. The method modifies the conventionalprocess such that electro-static discharge (ESD) defects are reduced andetch rates are not degraded. In addition, the process is carried out ina typical dielectric reactive ion etching tool, i.e., not a metal RIEtool.

While this invention has been described in conjunction with the specificembodiment(s) outlined above, it is evident that many alternatives,modifications and variations will be apparent to those skilled in theart. Accordingly, the embodiments of the invention as set forth aboveare intended to be illustrative, not limiting. Various changes may bemade without departing from the spirit and scope of the invention asdefined in the following claims.

1. A method of etching to expose a conductor, the method comprising: etching through a first dielectric layer including silicon dioxide (SiO₂) using a chemistry including octafluorocyclobutane (C₄F₈); and etching through a cap layer including titanium nitride (TiN) using a chemistry including tetrafluoro methane (CF₄) to expose the conductor.
 2. The method of claim 1, wherein the first dielectric layer etching step includes using the following conditions: approximately 90-110 mTorr (mT) of pressure, an RF energy of approximately 950-1050 watts (W) at approximately 27 MHz at one electrode and at approximately 2 MHz at another electrode, and a gas flow of approximately 375-425 standard cubic centimeters (sccm) of argon (Ar), approximately 13-17 sccm of octafluorocyclobutane (C₄F₈) and approximately 5-7 sccm of oxygen (O₂).
 3. The method of claim 1, wherein the cap layer etching step includes using the following conditions: approximately 255-285 mT of pressure, an RF energy of approximately 1350-1450 W at approximately 27 MHz at one electrode and approximately 650-750 W at approximately 2 MHz at another electrode, and a gas flow of approximately 135-165 sccm of tetrafluoro methane (CF₄) and approximately 90-110 sccm of nitrogen (N₂).
 4. The method of claim 1, wherein each etching step is conducted in a reactive ion etching tool.
 5. The method of claim 1, wherein each etching step includes using the following conditions: a wafer-holding chuck pressure of approximately 18-22 Torr of helium (He), and a chuck temperature of approximately 18-22° C.
 6. The method of claim 1, further comprising the step of performing a descum prior to the etching of the first dielectric layer.
 7. The method of claim 6, wherein the descum performing step includes using a gas flow including nitrogen (N₂) and hydrogen (H₂).
 8. The method of claim 1, further comprising the step of etching through a second dielectric layer including silicon nitride (Si₃N₄) prior to etching the first dielectric layer, the second dielectric positioned over the first dielectric layer.
 9. The method of claim 1, further comprising the step of performing an ash after the cap layer etching step.
 10. A method of etching to expose a conductor, the method comprising: etching through a first dielectric layer including silicon nitride (Si₃N₄); etching through a second dielectric layer including silicon dioxide (SiO₂) using a chemistry including a gas flow of approximately 13-17 standard cubic centimeters (sccm) of octafluorocyclobutane (C₄F₈); and etching through a cap layer including titanium nitride (TiN) using a chemistry including a gas flow of approximately 135-165 sccm of tetrafluoro methane (CF₄) to expose the conductor.
 11. The method of claim 10, wherein the second dielectric layer etching step includes using the following conditions: approximately 90-110 mTorr (mT) of pressure, an RF energy of approximately 950-1050 watts (W) at approximately 27 MHz at one electrode and at approximately 2 MHz at another electrode, and the gas flow further includes approximately 375-425 sccm of argon (Ar) and approximately 5-7 sccm of oxygen (O₂).
 12. The method of claim 10, wherein the cap layer etching step includes using the following conditions: approximately 255-285 mT of pressure, an RF energy of approximately 1350-1450 W at approximately 27 MHz at one electrode and approximately 650-750 W at approximately 2 MHz at another electrode, and the gas flow further includes approximately 90-110 sccm of nitrogen (N₂).
 13. The method of claim 10, wherein each etching step is conducted in a reactive ion etching tool.
 14. The method of claim 10, wherein each etching step includes using the following conditions: a wafer-holding chuck pressure of approximately 18-22 Torr of helium (He), and a chuck temperature of approximately 18-22° C.
 15. The method of claim 10, further comprising the step of performing a descum prior to the etching of the first dielectric layer, the descum performing step including using a gas flow of nitrogen (N₂) and hydrogen (H₂).
 16. The method of claim 15, wherein the descum step includes using the following additional conditions: a wafer-holding chuck pressure of approximately 18-22 Torr of helium (He), and a chuck temperature of approximately 18-22° C.
 17. The method of claim 10, further comprising the step of performing an ash after the cap layer etching step.
 18. A method of exposing a conductor below a stack including a patterned photoresist over a silicon nitride (Si₃N₄) layer over a silicon dioxide (SiO₂) layer over a titanium nitride (TiN) cap layer, the method comprising the steps of: etching through the silicon nitride (Si₃N₄) layer; etching through the silicon dioxide (SiO₂) layer using the following conditions: approximately 90-110 mTorr (mT) of pressure, an RF energy of approximately 950-1050 watts (W) at approximately 27 MHz at one electrode and at approximately 2 MHz at another electrode, and a gas flow of approximately 375-425 sccm of argon (Ar), approximately 13-17 sccm of octafluorocyclobutane (C₄F₈) and approximately 5-7 sccm of oxygen (O₂); and etching through the titanium nitride (TiN) layer using the following conditions: approximately 255-285 mT of pressure, an RF energy of approximately 1350-1450 W at approximately 27 MHz at one electrode and approximately 650-750 W at approximately 2 MHz at another electrode, and a gas flow of approximately 135-165 sccm of tetrafluoro methane (CF₄) and approximately 90-110 sccm of nitrogen (N₂).
 19. The method of claim 18, wherein the etching steps are preceded by a performing a descum step and followed by performing an ash step.
 20. The method of claim 18, wherein each etching step includes using the following conditions: a wafer-holding chuck pressure of approximately 18-22 Torr of helium (He), and a chuck temperature of approximately 18-22° C. 